verilog xil_defaultlib --include "../../../ipstatic" \
"../../../../PipelineProcessor.gen/sources_1/ip/phase_locked_loop/phase_locked_loop_clk_wiz.v" \
"../../../../PipelineProcessor.gen/sources_1/ip/phase_locked_loop/phase_locked_loop.v" \

verilog xil_defaultlib "glbl.v"

# Do not sort compile order
nosort
