`timescale 1ns / 1ps
module MemoryForward (
    input WB_register_write,
    input [4:0] WB_register_write_address,
    input [4:0] MEM_rt_address,
    output MEM_write_data_source
);

    assign MEM_write_data_source = (WB_register_write == 1'b1) ?
        ((MEM_rt_address != 5'b00000 && WB_register_write_address == MEM_rt_address) ? 1 : 0) : 0;
endmodule