From 6f1d6eb9558de63f5bcf792825379d3bb24b6378 Mon Sep 17 00:00:00 2001 From: unlockable Date: Wed, 10 Jul 2024 23:56:17 +0800 Subject: [PATCH] Test all command (part 2) --- 03test_all_inst_part2.asm | 11 +++++++++++ 03test_all_inst_part2.txt | 11 +++++++++++ 03test_all_inst_part2_mars.txt | 11 +++++++++++ 3 files changed, 33 insertions(+) create mode 100644 03test_all_inst_part2.asm create mode 100644 03test_all_inst_part2.txt create mode 100644 03test_all_inst_part2_mars.txt diff --git a/03test_all_inst_part2.asm b/03test_all_inst_part2.asm new file mode 100644 index 0000000..fdfc331 --- /dev/null +++ b/03test_all_inst_part2.asm @@ -0,0 +1,11 @@ +lui $s0, 0xca +addi $s0, $s0, 0xfe +addi $s1, $zero, -0x21 +sll $s2, $s0, 4 +srl $s2, $s0, 2 +sra $s2, $s1, 1 +slt $s2, $s1, $s0 +slt $s2, $s0, $s1 +sltu $s1, $s1, $s0 +slti $s2, $s0, 0x4 +sltiu $s2, $s0, -0x4 \ No newline at end of file diff --git a/03test_all_inst_part2.txt b/03test_all_inst_part2.txt new file mode 100644 index 0000000..726b44b --- /dev/null +++ b/03test_all_inst_part2.txt @@ -0,0 +1,11 @@ +20'd0: instruction <= 32'h3c1000ca; // lui $s0, 0xca +20'd6: instruction <= 32'h221000fe; // addi $s0, $s0, 0xfe +20'd11: instruction <= 32'h2011ffdf; // addi $s1, $zero, -0x21 +20'd16: instruction <= 32'h00109100; // sll $s2, $s0, 4 +20'd21: instruction <= 32'h00109082; // srl $s2, $s0, 2 +20'd26: instruction <= 32'h00119043; // sra $s2, $s1, 1 +20'd31: instruction <= 32'h0230902a; // slt $s2, $s1, $s0 +20'd36: instruction <= 32'h0211902a; // slt $s2, $s0, $s1 +20'd41: instruction <= 32'h0230882b; // sltu $s1, $s1, $s0 +20'd46: instruction <= 32'h2a120004; // slti $s2, $s0, 0x4 +20'd51: instruction <= 32'h2e12fffc; // sltiu $s2, $s0, -0x4 \ No newline at end of file diff --git a/03test_all_inst_part2_mars.txt b/03test_all_inst_part2_mars.txt new file mode 100644 index 0000000..2ab8638 --- /dev/null +++ b/03test_all_inst_part2_mars.txt @@ -0,0 +1,11 @@ +3c1000ca +221000fe +2011ffdf +00109100 +00109082 +00119043 +0230902a +0211902a +0230882b +2a120004 +2e12fffc