unlockable/PipelineProcessorTests
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unlockable
2024-07-11 15:21:49 +08:00
parent bd64dcf361
commit 79cbd5b0a4
5 changed files with 39 additions and 3 deletions
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8
create_verilog_from_asm.py
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@@ -1,5 +1,7 @@
file_name = input("File name: ")
with open(file_name) as fl:
with open(file_name + "_mars.txt") as fl:
file_content = fl.readlines()
for idx, inst in enumerate(file_content):
print("20'd%d: instruction <= 32'h%s;" % (idx, inst.strip()))
with open(file_name + ".txt", "w") as fl:
for idx, inst in enumerate(file_content):
# print("20'd%d: instruction <= 32'h%s;" % (idx, inst.strip()))
fl.write("20'd%d: instruction <= 32'h%s;\n" % (idx, inst.strip()))