unlockable/PipelineProcessorTests
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Better timing

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This commit is contained in:
unlockable
2024-07-12 00:39:39 +08:00
parent 7d03871706
commit e307e41f70
3 changed files with 8 additions and 8 deletions
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8
20display_num.asm
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@@ -89,7 +89,7 @@ display_number:
addi $s2, $s2, 0x20
# s3 is the counter for a complete scan of 4 digit
addi $s3, $zero, 0x2ed4
addi $s3, $zero, 0xbe2
all_digit_scan_loop:
# s4 is the num being shifted gradually
addi $s4, $s0, 0
@@ -111,7 +111,7 @@ single_digit_loop:
sll $s6, $s6, 1
# jal wait_for_digit_time
addi $t0, $zero, 0x00ff
addi $t0, $zero, 0x400
wait_time_loop:
addi $t0, $t0, -1
bgtz $t0, wait_time_loop
@@ -121,8 +121,8 @@ wait_time_loop:
# end of single digit loop
# ** depends on the clock **
# four digit, 83.42us.
# 1s / 83.42us = 11988 = (2ed4)hex
# four digit, 328.68us.
# 1s / 328.68us = 3042 = (be2)hex
addi $s3, $s3, -1
bgtz $s3, all_digit_scan_loop

4
20display_num.txt
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@@ -55,7 +55,7 @@
20'd54: instruction <= 32'h20b10000;
20'd55: instruction <= 32'h3c124000;
20'd56: instruction <= 32'h22520020;
20'd57: instruction <= 32'h20132ed4;
20'd57: instruction <= 32'h20130be2;
20'd58: instruction <= 32'h22140000;
20'd59: instruction <= 32'h20160100;
20'd60: instruction <= 32'h20150004;
@@ -67,7 +67,7 @@
20'd66: instruction <= 32'hae280000;
20'd67: instruction <= 32'h0014a102;
20'd68: instruction <= 32'h0016b040;
20'd69: instruction <= 32'h200800ff;
20'd69: instruction <= 32'h20080400;
20'd70: instruction <= 32'h2108ffff;
20'd71: instruction <= 32'h1d00fffe;
20'd72: instruction <= 32'h22b5ffff;

4
20display_num_mars.txt
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@@ -55,7 +55,7 @@ afb60020
20b10000
3c124000
22520020
20132ed4
20130be2
22140000
20160100
20150004
@@ -67,7 +67,7 @@ afb60020
ae280000
0014a102
0016b040
200800ff
20080400
2108ffff
1d00fffe
22b5ffff