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Fix ori problems

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This commit is contained in:
un-lock-able
2024-07-12 10:54:42 +08:00
parent f391a7bfd2
commit ac525eb4c0
2 changed files with 10 additions and 91 deletions
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11
PipelineProcessor.srcs/sources_1/new/ControlUnit.v
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@@ -61,15 +61,16 @@ module ControlUnit (
(funct == 6'h0 || funct == 6'h2 || funct == 6'h3)) ? 1 : 0;
assign ALU_source2 = (opcode == 6'h23 || opcode == 6'h2b || opcode == 6'hf ||
opcode == 6'h8 || opcode == 6'h9 || opcode == 6'hc || opcode == 6'ha ||
opcode == 6'hb) ? 1 : 0;
opcode == 6'h8 || opcode == 6'h9 || opcode == 6'hc || opcode == 6'hd ||
opcode == 6'ha || opcode == 6'hb) ? 1 : 0;
assign register_write_destination_source = (opcode == 6'h23 || opcode == 6'h8 ||
opcode == 6'h9 || opcode == 6'hc ||
opcode == 6'ha || opcode == 6'hb ||
opcode == 6'hf || (opcode == 6'h0 &&
opcode == 6'hd || opcode == 6'ha ||
opcode == 6'hb || opcode == 6'hf ||
(opcode == 6'h0 &&
(funct == 6'h0 || funct == 6'h2 ||
funct == 6'h3))) ? 0 : 1;
assign extendop = (opcode == 6'hf) ? 2'b10 : (opcode == 6'hc) ? 2'b01 : 2'b00;
assign extendop = (opcode == 6'hf) ? 2'b10 : (opcode == 6'hc || opcode == 6'hd) ? 2'b01 : 2'b00;
endmodule

90
PipelineProcessor.srcs/sources_1/new/InstructionMemory.v
View File

@@ -7,92 +7,10 @@ module InstructionMemory (
always @(*) begin
case (address[31:2])
20'd0: instruction <= 32'h3c1d4000;
20'd1: instruction <= 32'h23bd07ff;
20'd2: instruction <= 32'h3c104000;
20'd3: instruction <= 32'h22100020;
20'd4: instruction <= 32'h2011003f;
20'd5: instruction <= 32'hae110000;
20'd6: instruction <= 32'h20110006;
20'd7: instruction <= 32'hae110004;
20'd8: instruction <= 32'h2011005b;
20'd9: instruction <= 32'hae110008;
20'd10: instruction <= 32'h2011004f;
20'd11: instruction <= 32'hae11000c;
20'd12: instruction <= 32'h20110066;
20'd13: instruction <= 32'hae110010;
20'd14: instruction <= 32'h2011006d;
20'd15: instruction <= 32'hae110014;
20'd16: instruction <= 32'h2011007d;
20'd17: instruction <= 32'hae110018;
20'd18: instruction <= 32'h20110007;
20'd19: instruction <= 32'hae11001c;
20'd20: instruction <= 32'h2011007f;
20'd21: instruction <= 32'hae110020;
20'd22: instruction <= 32'h2011006f;
20'd23: instruction <= 32'hae110024;
20'd24: instruction <= 32'h20110077;
20'd25: instruction <= 32'hae110028;
20'd26: instruction <= 32'h2011007c;
20'd27: instruction <= 32'hae11002c;
20'd28: instruction <= 32'h20110058;
20'd29: instruction <= 32'hae110030;
20'd30: instruction <= 32'h2011005e;
20'd31: instruction <= 32'hae110034;
20'd32: instruction <= 32'h20110079;
20'd33: instruction <= 32'hae110038;
20'd34: instruction <= 32'h20110071;
20'd35: instruction <= 32'hae11003c;
20'd36: instruction <= 32'h3c114000;
20'd37: instruction <= 32'h22310010;
20'd38: instruction <= 32'h20100a80;
20'd39: instruction <= 32'h22100001;
20'd40: instruction <= 32'h22040000;
20'd41: instruction <= 32'h22250000;
20'd42: instruction <= 32'h0c00002c;
20'd43: instruction <= 32'h08000027;
20'd44: instruction <= 32'h23bdffe0;
20'd45: instruction <= 32'hafbf0004;
20'd46: instruction <= 32'hafb00008;
20'd47: instruction <= 32'hafb1000c;
20'd48: instruction <= 32'hafb20010;
20'd49: instruction <= 32'hafb30014;
20'd50: instruction <= 32'hafb40018;
20'd51: instruction <= 32'hafb5001c;
20'd52: instruction <= 32'hafb60020;
20'd53: instruction <= 32'h20900000;
20'd54: instruction <= 32'h20b10000;
20'd55: instruction <= 32'h3c124000;
20'd56: instruction <= 32'h22520020;
20'd57: instruction <= 32'h20132ed4;
20'd58: instruction <= 32'h22140000;
20'd59: instruction <= 32'h20160100;
20'd60: instruction <= 32'h20150004;
20'd61: instruction <= 32'h3288000f;
20'd62: instruction <= 32'h00084080;
20'd63: instruction <= 32'h02484020;
20'd64: instruction <= 32'h8d080000;
20'd65: instruction <= 32'h01164025;
20'd66: instruction <= 32'hae280000;
20'd67: instruction <= 32'h0014a102;
20'd68: instruction <= 32'h0016b040;
20'd69: instruction <= 32'h200800ff;
20'd70: instruction <= 32'h2108ffff;
20'd71: instruction <= 32'h1d00fffe;
20'd72: instruction <= 32'h22b5ffff;
20'd73: instruction <= 32'h1ea0fff3;
20'd74: instruction <= 32'h2273ffff;
20'd75: instruction <= 32'h1e60ffee;
20'd76: instruction <= 32'h8fbf0004;
20'd77: instruction <= 32'h8fb00008;
20'd78: instruction <= 32'h8fb1000c;
20'd79: instruction <= 32'h8fb20010;
20'd80: instruction <= 32'h8fb30014;
20'd81: instruction <= 32'h8fb40018;
20'd82: instruction <= 32'h8fb5001c;
20'd83: instruction <= 32'h8fb60020;
20'd84: instruction <= 32'h23bd0020;
20'd85: instruction <= 32'h03e00008;
20'd0: instruction <= 32'h3c010000;
20'd1: instruction <= 32'h3421fadd;
20'd2: instruction <= 32'h00018020;
20'd3: instruction <= 32'h08000003;
default: instruction <= 32'h00000000;
endcase
end