Files
PipelineProcessorTests/create_verilog_from_asm.py
unlockable aa64c19c8b Test neq
2024-07-10 23:56:40 +08:00

5 lines
202 B
Python

file_name = input("File name: ")
with open(file_name) as fl:
file_content = fl.readlines()
for idx, inst in enumerate(file_content):
print("20'd%d: instruction <= 32'h%s;" % (idx, inst.strip()))