Files
PipelineProcessorTests/Signals.md
2024-07-13 22:59:07 +08:00

7.4 KiB

PCJump IsBranch IsLoadWord Writera raAddrSrc RegWr WBSrc MemWrite ALUFunct ALUSrc1 ALUSrc2 RegWriteDstSrc ExtOp Opcode(hex) Funct(hex)
lw 00 0 1 0 X 1 1 0 add(00010)2 0 1 0 signed(00) 23 -
sw 00 0 0 0 X 0 X 1 add(00010)2 0 1 X signed(00) 2b -
lui 00 0 0 0 X 1 0 0 add(00010)2 0 1 0 lui(1X) f -
add 00 0 0 0 X 1 0 0 add(00010)2 0 0 1 X 0 20
addu 00 0 0 0 X 1 0 0 add(00010)2 0 0 1 X 0 21
sub 00 0 0 0 X 1 0 0 sub(00110)6 0 0 1 X 0 22
subu 00 0 0 0 X 1 0 0 sub(00110)6 0 0 1 X 0 23
addi 00 0 0 0 X 1 0 0 add(00010)2 0 1 0 signed(00) 8 -
addiu 00 0 0 0 X 1 0 0 add(00010)2 0 1 0 signed(00) 9 -
mul 00 0 0 0 X 1 0 0 mul(11010)26 0 0 1 X 0 18
and 00 0 0 0 X 1 0 0 and(00000)0 0 0 1 X 0 24
or 00 0 0 0 X 1 0 0 or(00001)1 0 0 1 X 0 25
xor 00 0 0 0 X 1 0 0 xor(01101)13 0 0 1 X 0 26
nor 00 0 0 0 X 1 0 0 nor(01100)12 0 0 1 X 0 27
andi 00 0 0 0 X 1 0 0 and(00000)0 0 1 0 unsigned(01) c -
ori 00 0 0 0 X 1 0 0 or(00001)1 0 1 0 unsigned(01) d -
sll 00 0 0 0 X 1 0 0 sll(10000)16 1 0 1 X 0 00
srl 00 0 0 0 X 1 0 0 srl(11000)24 1 0 1 X 0 02
sra 00 0 0 0 X 1 0 0 sra(11001)25 1 0 1 X 0 03
slt 00 0 0 0 X 1 0 0 slt(00111)7 0 0 1 X 0 2a
sltu 00 0 0 0 X 1 0 0 sltu(01000)8 0 0 1 X 0 2b
slti 00 0 0 0 X 1 0 0 slt(00111)7 0 1 0 signed(00) a -
sltiu 00 0 0 0 X 1 0 0 sltu(01000)8 0 1 0 signed(00) b -
beq 00 1 0 0 X 0 X 0 eq(10001)17 0 0 X X 4 -
bne 00 1 0 0 X 0 X 0 neq(10010)18 0 0 X X 5 -
blez 00 1 0 0 X 0 X 0 le/ngt(10101)21 0 0 X X 6 -
bgtz 00 1 0 0 X 0 X 0 gt(10011)19 0 0 X X 7 -
bltz 00 1 0 0 X 0 X 0 lt(10100)20 0 0 X X 1 -
j 01 0 0 0 X 0 X 0 X X X X X 2 -
jal 01 0 0 1 0 0 X 0 X X X X X 3 -
jr 1X 0 0 0 X 0 X 0 X X X X X 0 08
jalr 1X 0 0 1 1 0 X 0 X X X X X 0 09
nop 00 0 0 0 X 0 X 0 X X X X X 0 00